## Krishnendu Chakrabarty, Professor

Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now the William H. Younger Distinguished Professor of Engineering in the Department of Electrical and Computer Engineering and Professor of Computer Science at Duke University. He is also a Chair Professor in Tsinghua University, Beijing, China, and a Visiting Chair Professor in the National Cheng Kung University in Tainan, Taiwan .

Prof. Chakrabarty is a recipient of the National Science Foundation Early Faculty (CAREER) award, the Office of Naval Research Young Investigator award, the Humboldt Research Award from the Alexander von Humboldt Foundation, Germany, and several best papers awards at IEEE conferences. His current research projects include: testing and design-for-testability of integrated circuits and systems; digital microfluidics, biochips, and cyberphysical systems; resilient computing systems; enterprise system optimization.

Prof. Chakrabarty is a Fellow of ACM, a Fellow of IEEE, and a Golden Core Member of the IEEE Computer Society. He was a 2009 Invitational Fellow of the Japan Society for the Promotion of Science (JSPS). He is a recipient of the 2008 Duke University Graduate School Dean’s Award for excellence in mentoring, and the 2010 Capers and Marion McDonald Award for Excellence in Mentoring and Advising, Pratt School of Engineering, Duke University. He served as a Distinguished Visitor of the IEEE Computer Society during 2005-2007, and as a Distinguished Lecturer of the IEEE Circuits and Systems Society during 2006-2007. Currently he serves as an ACM Distinguished Speaker, as well as a Distinguished Visitor of the IEEE Computer Society for 2010-2012. He is the Editor-in-Chief for IEEE Design & Test of Computers and for ACM Journal on Emerging Technologies in Computing Systems. Prof. Chakrabarty is also an Associate Editor of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Circuits and Systems II, and IEEE Transactions on Biomedical Circuits and Systems. He serves as an Editor of the Journal of Electronic Testing: Theory and Applications (JETTA).

Contact Info:
 Office Location: 2513 CIEMAS Office Phone: (919) 660-5270 Email Address: Web Page:

Education:

Ph.D., University of Michigan at Ann Arbor, 1995
M.S., University of Michigan at Ann Arbor, 1992
B. Tech., Indian Institute of Technology, Kharagpur, India, 1990
Specialties:

Computer Engineering
Nanoscale/microscale computing systems
Self-assembled computer architecture
Micro-electronic mechanical machines
Failure Analysis
Integrated Nanoscale Systems
Microsystems
Awards, Honors, and Distinctions

Fellow, Association for Computing Machinery
Fellow, ACM, 2013
Humboldt Research Award, 2013
2008 Dean's Award for Mentoring, Duke University, Graduate School, 2008
Best Paper Award, IEEE International Conference on Computer Design, 2005
Best Paper Award, IEEE Design Automation and Test in Europe Conference, 2001
Distinguished Lecturer, IEEE Circuits and Systems Society, 2006-2007, 2011-2013
Distinguished Visitor, IEEE Computer Society, 2005-2007, 2010-2012
Fellow, IEEE, 2008
Member, Sigma Xi
NSF Early CAREER Award, National Science Foundation, 1999
ONR Young Investigator Award, Office of Naval Research, 2001
Senior Member, American Chemical Society
Fellows, Institute for Electrical and Electronics Engineers
Teaching (Spring 2018):

• ECE 538.01, VLSI SYSTEM TESTING Synopsis
Teer 114, TuTh 10:05 AM-11:20 AM
Recent Publications   (More Publications)   (search)

1. Georgiou, P; Vartziotis, F; Kavousianos, X; Chakrabarty, K, Testing 3D-SoCs Using Two-Dimensional Time-Division Multiplexing, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (December, 2017) [doi]  [abs].
2. Vijayan, A; Kiamehr, S; Oboril, F; Chakrabarty, K; Tahoori, MB, Workload-aware Static Aging Monitoring and Mitigation of Timing-critical Flip-flops, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (November, 2017) [doi]  [abs].
3. Xia, L; Huangfu, W; Tang, T; Yin, X; Chakrabarty, K; Xie, Y; Wang, Y; Yang, H, Stuck-at Fault Tolerance in RRAM Computing Systems, IEEE Journal of Emerging and Selected Topics in Circuits and Systems (November, 2017) [doi]  [abs].
4. Jin, S; Zhang, Z; Chakrabarty, K; Gu, X, Towards Predictive Fault Tolerance in a Core-Router System: Anomaly Detection Using Correlation-Based Time-Series Analysis, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (November, 2017) [doi]  [abs].
5. Vartziotis, F; Kavousianos, X; Georgiou, P; Chakrabarty, K, A Branch-&-Bound Test-Access-Mechanism Optimization Method for Multi-$V-{\mathrm{ dd}}$ SoCs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36 no. 11 (November, 2017), pp. 1911-1924 [doi]  [abs].
Duties:

Prof. Chakrabarty's research interests include design and testing of nanometer integrated circuits, design of digital microfluidic biochips, circuits and computing systems based on emerging technologies, and wireless/sensor networks. He teaches courses in Computer Engineering and Microsystems. He is a Fellow of IEEE