Papers Published
Abstract:
A mixed-signal implementation of an iterative bound-based nonlinear data acquisition decoding algorithm for first-order delta-sigma (ΔΣ) analog-to-digital converters (ADCs) is discussed. The design is partitioned into analog and digital sections which optimize the design objectives of very small area while maintaining low power and high speed. The circuit has been realized using 0.7mm2 in 0.5μm CMOS technology and is estimated to occupy 0.44mm2 without test circuits
Keywords:
CMOS integrated circuits;data acquisition;delta-sigma modulation;iterative decoding;mixed analogue-digital integrated circuits;nonlinear codes;