Papers Published

1. Tong, Q.-Y. and Lee, T.-H. and Kim, W.-J. and Tan, T.Y. and Gosele, U., Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding, 1996 IEEE International SOI Conference Proceedings (Cat. No.35937) (1996), pp. 36 - 7 [SOI.1996.552481] .
   (last updated on 2007/04/10)

   Abstract:
   Reports here the first results of using plasma enhanced CVD TEOS (Si(C₂H₅O)₄) oxide (PETEOS) and associated CMP (Chemical Mechanical Polishing) technology to form a flat layer on the surface of a processed VLSI bulk Si wafer for direct bonding. The undoped PETEOS oxide has also been used as a bonding layer for substrates onto which the IC layer is to be transfered and whose surfaces are not favorable for bonding

   Keywords:
   integrated circuit technology;plasma CVD;polishing;VLSI;wafer bonding;