Papers Published

1. Chakrabarty, K; Das, SR, Test-set embedding based on width compression for mixed-mode BIST, Ieee Transactions on Instrumentation and Measurement, vol. 49 no. 3 (June, 2000), pp. 671-678, Institute of Electrical and Electronics Engineers (IEEE) [doi] .
   (last updated on 2022/12/30)

   Abstract:
   We present a new test generator circuit (TGC) for mixed-mode built-in self-test (BIST) that embeds a precomputed deterministic test set T D in a longer sequence. The design method employs width compression based on the property of d-compatibles. To demonstrate the feasibility of the TGC design methods, we present experimental data for single stuck-at test sets for the ISCAS 85 circuits and full-scan versions of the ISCAS 89 benchmark circuits. We also achieve significant improvement over another recently-proposed mixed-mode TGC design scheme for BIST.