Papers Published

1. Zamani, M; Tahoori, MB; Chakrabarty, K, Ping-pong test: Compact test vector generation for reversible circuits, Proceedings of the Ieee Vlsi Test Symposium (August, 2012), pp. 164-169, IEEE [doi] .
   (last updated on 2022/12/30)

   Abstract:
   Reversibility as an inherent requirement of quantum computation motivates further research on reversible logic. Due to anticipated high failure rates for such technologies, thorough testing is a must for these circuits. In this paper, we present a compact test generation and application method for reversible circuits which achieves high (100%) fault coverage and can be adopted for BIST implementations. In this method, the next test pattern is the response of the reversible circuit to the previous test pattern. A test generation algorithm to minimize test time and achieve 100% fault coverage is also presented. Simulation results on a set of reversible benchmark circuits confirm that this approach can detect all single missing/repeated gate faults as well as the majority of multiple faults. © 2012 IEEE.