search .
Papers Published
- Roy, S; Mitra, D; Bhattacharya, BB; Chakrabarty, K, Congestion-aware layout design for high-throughput digital microfluidic biochips,
Acm Journal on Emerging Technologies in Computing Systems, vol. 8 no. 3
(August, 2012),
pp. 1-23, Association for Computing Machinery (ACM) [doi] .
(last updated on 2022/12/30)Abstract:
Potential applications of digital microfluidic (DMF) biochips now include several areas of real-life applications like environmental monitoring, water and air pollutant detection, and food processing to name a few. In order to achieve sufficiently high throughput for these applications, several instances of the same bioassay may be required to be executed concurrently on different samples. As a straightforward implementation, several identical biochips can be integrated on a single substrate as a multichip to execute the assay for various samples concurrently. Controlling individual electrodes of such a chip by independent pins may not be acceptable since it increases the cost of fabrication. Thus, in order to keep the overall pin-count within an acceptable bound, all the respective electrodes of these individual pieces are connected internally underneath the chip so that they can be controlled with a single external control pin. In this article, we present an orientation strategy for layout of a multichip that reduces routing congestion and consequently facilitates wire routing for the electrode array. The electrode structure of the individual pieces of the multichip may be either direct-addressable or pin-constrained. The method also supports a hierarchical approach to wire routing that ensures scalability. In this scheme, the size of the biochip in terms of the total number of electrodes may be increased by a factor of four by increasing the number of routing layers by only one. In general, for a multichip with 4 n identical blocks, (n + 1) layers are sufficient for wire routing. © 2012 ACM.