Papers Published

1. Chakrabarty, K; Murray, BT; Hayes, JP, Optimal zero-aliasing space compaction of test responses, Ieee Transactions on Computers, vol. 47 no. 11 (December, 1998), pp. 1171-1187, Institute of Electrical and Electronics Engineers (IEEE) [doi] .
   (last updated on 2022/12/30)

   Abstract:
   Many built-in self-testing (BIST) schemes compress the test responses from a k-output circuit to q signature streams, where q < < k, a process termed space compaction. The effectiveness of such a compaction method can be measured by its compaction ratio c = k/q. A high compaction ratio can introduce aliasing, which occurs when a faulty test response maps to the fault-free signature. We investigate the problem of designing zero-aliasing space compaction circuits with maximum compaction ratio c max. We introduce a graph representation of test responses to study the space compaction process and relate space compactor design to a graph coloring problem. Given a circuit under test, a fault model, and a test set, we determine q min, which yields c max = k/q min. This provides a fundamental bound on the cost of signature-based BIST. We show that q min ≤ 2 for all the ISCAS 85 benchmark circuits. We develop a systematic design procedure for the synthesis of space compaction circuits and apply it to a number of ISCAS 85 circuits. Finally, we describe multistep compaction, which allows zero aliasing to be achieved with any q, even when q min > 1. © 1998 IEEE.