Papers Published

1. Xiang, D; Yin, B; Chakrabarty, K, Compact test generation for small-delay defects using testable-path information, Proceedings of the Asian Test Symposium (December, 2009), pp. 424-429, IEEE [doi] .
   (last updated on 2022/12/30)

   Abstract:
   Testing for small-delay defects requires fault-effect propagation along the longest testable paths. However, the selection of the longest testable paths requires high CPU time and leads to large pattern counts. Dynamic test compaction for small-delay defects has remained largely unexplored thus far. We propose a path-selection scheme to accelerate ATPG based on stored testable critical-path information. A new dynamic test-compaction technique based on structural analysis is also introduced. Simulation results are presented for a set of ISCAS'89 benchmark circuits. © 2009 IEEE.