Papers Published

1. Mirabedini, M.R. and Goodwin-Johansson, S.H. and Massoud, H.Z. and Fair, R.B., Subquarter-micrometre elevated source-and-drain MOSFET structure using polysilicon spacers, Electron. Lett. (UK), vol. 30 no. 19 (15), pp. 1631 - 2 [el:19941068] .
   (last updated on 2007/04/15)

   Abstract:
   A novel subquarter-micrometre MOSFET with a selfaligned source and drain structure is proposed with elevated sources and drains formed by using polysilicon spacers. The spacers can reduce the effective channel length by 50% compared to the mask length, and reduce the junction capacitance by over 30% through a reduction in junction area, as shown by PISCES simulations. A graded oxide spacer is used to decrease the parasitic gate-to-drain capacitance

   Keywords:
   capacitance;elemental semiconductors;insulated gate field effect transistors;semiconductor device models;silicon;