Papers Published

1. Mitani, K. and Massoud, H.Z., C-V measurement and simulation of silicon-insulator-silicon (SIS) structures for analyzing charges in buried oxides of bonded SOI materials, IEICE Trans. Electron. (Japan), vol. E75-C no. 12 (1992), pp. 1421 - 9 .
   (last updated on 2007/04/15)

   Abstract:
   Charges in buried oxide layers formed by wafer bonding were evaluated by capacitance-voltage (C-V) measurements. In this study, silicon-insulator-silicon (SIS) and metal-oxide-silicon (MOS) capacitors were fabricated on bonded wafers. For analyzing C-V curves of SIS structures, C-V simulation programs were developed. From the analysis, the authors concludes that approximately 2×10¹¹/cm² negative charges were distributed uniformly in the oxide. The effect of the experimental conditions during wafer bonding on generated charges in buried oxides is also discussed

   Keywords:
   metal-insulator-semiconductor structures;semiconductor-insulator-semiconductor structures;wafer bonding;