Publications [#61024] of Roger C. Barr

Papers Published

1. Krakow, W.T. and Sacks, B. and Roy, S.C. and Batchelor, W.E. and Bohs, L.N. and Barr, R.C., Simulation and vertification of a chip architecture for electrocardiogram data compression, Modeling and Simulation, Proceedings of the Annual Pittsburgh Conference, vol. 21 no. pt 4 (1990), pp. 1677 - 1681, Pittsburgh, PA, USA
   (last updated on 2007/04/12)

   Abstract:
   The simulation and verification of a VLSI chip for real-time compression of electrocardiogram data is presented. We describe a three-tier simulation process, and tell how this approach assisted in the development of the chip. The verification procedure allowed for consistency checking between all representations of the design. An added benefit of the process was automatic synthesis and layout of a large portion of the chip.

   Keywords:
   Biomedical Engineering - Cardiology;