Publications [#237276] of Xiaobai Sun

Journal articles or Book chapters PUBLISHED

1. Kim, JS; Deng, L; Mangalagiri, P; Irick, K; Sobti, K; Kandemir, M; Narayanan, V; Chakrabarti, C; Pitsianis, N; Sun, X, An automated framework for accelerating numerical algorithms on reconfigurable platforms using algorithmic/architectural optimization, IEEE Transactions on Computers, vol. 58 no. 12 (December, 2009), pp. 1654-1667, Institute of Electrical and Electronics Engineers (IEEE), ISSN 0018-9340 [doi]
   (last updated on 2025/02/02)

   Abstract:
   This paper describes TANOR, an automated framework for designing hardware accelerators for numerical computation on reconfigurable platforms. Applications utilizing numerical algorithms on large-size data sets require high-throughput computation platforms. The focus is on N-body interaction problems which have a wide range of applications spanning from astrophysics to molecular dynamics. The TANOR design flow starts with a MATLAB description of a particular interaction function, its parameters, and certain architectural constraints specified through a graphical user interface. Subsequently, TANOR automatically generates a configuration bitstream for a target FPGA along with associated drivers and control software necessary to direct the application from a host PC. Architectural exploration is facilitated through support for fully custom fixed-point and floating-point representations in addition to standard number representations such as single-precision floating point. Moreover, TANOR enables joint exploration of algorithmic and architectural variations in realizing efficient hardware accelerators. TANOR's capabilities have been demonstrated for three different N-body interaction applications: the calculation of gravitational potential in astrophysics, the diffusion or convolution with Gaussian kernel common in image processing applications, and the force calculation with vector-valued kernel function in molecular dynamics simulation. Experimental results show that TANOR-generated hardware accelerators achieve lower resource utilization without compromising numerical accuracy, in comparison to other existing custom accelerators. © 2009 IEEE.