Department of Mathematics
 Search | Help | Login | printable version

Math @ Duke





.......................

.......................


Reducing power consumption during execution of an application on a plurality of compute nodes

Patent Number: 8533504, issued on 2013/09/10    
Applied on 2008/05/29, 12/129,334
Inventor(s): Charles Archer, Michael Blocksome, Amanda Randles, Joseph Ratterman, Brian Smith
Assignee: International Business Machines Corporation

Abstract: Methods, apparatus, and products are disclosed for reducing power consumption during execution of an application on a plurality of compute nodes that include: powering up, during compute node initialization, only a portion of computer memory of the compute node, including configuring an operating system for the compute node in the powered up portion of computer memory; receiving, by the operating system, an instruction to load an application for execution; allocating, by the operating system, additional portions of computer memory to the application for use during execution; powering up the additional portions of computer memory allocated for use by the application during execution; and loading, by the operating system, the application into the powered up additional portions of computer memory.

Claims: 1. A method of reducing power consumption during execution of an application on a plurality of compute nodes, the method comprising: powering up, during compute node initialization, only a portion of computer memory of a compute node; configuring an operating system for the compute node in the powered up portion of computer memory, including copying an image of the operating system to the powered up portion of computer memory; receiving, by the operating system, an instruction to load an application for execution; allocating, by the operating system, additional portions of computer memory to the application for use during execution; powering up the additional portions of computer memory allocated for use by the application during execution, wherein powering up the additional portions of computer memory allocated for use by the application during execution further comprises powering up the additional portions of computer memory upon requests to access those additional portions of computer memory; and loading, by the operating system, the application into the powered up additional portions of computer memory. 2. The method of claim 1 further comprising: identifying, by the operating system, unused portions of the computer memory allocated to the application, the unused portions not utilized by the application during execution; and reducing power to at least some of the unused portions of the computer memory allocated to the application. 3. The method of claim 1 wherein: the computer memory of each compute node is characterized by varying levels of power consumption and varying levels of performance; and allocating, by the operating system, additional portions of computer memory to the application for use during execution further comprises allocating the additional portions of computer memory to the application in dependence upon the levels of power consumption and levels of performance that characterize the computer memory. 4. The method of claim 1 wherein allocating, by the operating system, additional portions of computer memory to the application for use during execution further comprises allocating the additional portions of computer memory to the application in dependence upon computer memory allocation instructions included in the application. 5. The method of claim 1 wherein the plurality of compute nodes are connected together for data communications using a plurality of data communications networks, at least one of the data communications networks optimized for collective operations, and at least one of the data communications networks optimized for point to point operations. 6. A parallel computer capable of reducing power consumption during execution of an application on a plurality of compute nodes, the parallel computer comprising the plurality of compute nodes, each compute node comprising one or more computer processors and computer memory operatively coupled to the computer processors, the computer memory having disposed within it computer program instructions capable of: powering up, during compute node initialization, only a portion of computer memory of a compute node; configuring an operating system for the compute node in the powered up portion of computer memory, including copying an image of the operating system to the powered up portion of computer memory; receiving, by the operating system, an instruction to load an application for execution; allocating, by the operating system, additional portions of computer memory to the application for use during execution; powering up the additional portions of computer memory allocated for use by the application during execution, wherein powering up the additional portions of computer memory allocated for use by the application during execution further comprises powering up the additional portions of computer memory upon requests to access those additional portions of computer memory; and loading, by the operating system, the application into the powered up additional portions of computer memory. 7. The parallel computer of claim 6 wherein the computer memory has disposed within it computer program instructions capable of: identifying, by the operating system, unused portions of the computer memory allocated to the application, the unused portions not utilized by the application during execution; and reducing power to at least some of the unused portions of the computer memory allocated to the application. 8. The parallel computer of claim 6 wherein: the computer memory of each compute node is characterized by varying levels of power consumption and varying levels of performance; and allocating, by the operating system, additional portions of computer memory to the application for use during execution further comprises allocating the additional portions of computer memory to the application in dependence upon the levels of power consumption and levels of performance that characterize the computer memory. 9. The parallel computer of claim 6 wherein allocating, by the operating system, additional portions of computer memory to the application for use during execution further comprises allocating the additional portions of computer memory to the application in dependence upon computer memory allocation instructions included in the application. 10. The parallel computer of claim 6 wherein the plurality of compute nodes are connected together for data communications using a plurality of data communications networks, at least one of the data communications networks optimized for collective operations, and at least one of the data communications networks optimized for point to point operations. 11. A computer program product for reducing power consumption during execution of an application on a plurality of compute nodes, the computer program product disposed upon a computer readable recordable medium, the computer program product comprising computer program instructions capable of: powering up, during compute node initialization, only a portion of computer memory of a compute node; configuring an operating system for the compute node in the powered up portion of computer memory, including copying an image of the operating system to the powered up portion of computer memory; receiving, by the operating system, an instruction to load an application for execution; allocating, by the operating system, additional portions of computer memory to the application for use during execution; powering up the additional portions of computer memory allocated for use by the application during execution, wherein powering up the additional portions of computer memory allocated for use by the application during execution further comprises powering up the additional portions of computer memory upon requests to access those additional portions of computer memory; and loading, by the operating system, the application into the powered up additional portions of computer memory. 12. The computer program product of claim 11 further comprising computer program instructions capable of: identifying, by the operating system, unused portions of the computer memory allocated to the application, the unused portions not utilized by the application during execution; and reducing power to at least some of the unused portions of the computer memory allocated to the application. 13. The computer program product of claim 11 wherein: the computer memory of each compute node is characterized by varying levels of power consumption and varying levels of performance; and allocating, by the operating system, additional portions of computer memory to the application for use during execution further comprises allocating the additional portions of computer memory to the application in dependence upon the levels of power consumption and levels of performance that characterize the computer memory. 14. The computer program product of claim 11 wherein allocating, by the operating system, additional portions of computer memory to the application for use during execution further comprises allocating the additional portions of computer memory to the application in dependence upon computer memory allocation instructions included in the application. 15. The computer program product of claim 11 wherein the plurality of compute nodes are connected together for data communications using a plurality of data communications networks, at least one of the data communications networks optimized for collective operations, and at least one of the data communications networks optimized for point to point operations.

 

dept@math.duke.edu
ph: 919.660.2800
fax: 919.660.2821

Mathematics Department
Duke University, Box 90320
Durham, NC 27708-0320